HaDes-V Launch

We are thrilled to announce the kickoff of our newly designed, RISC-V-based Microcontroller Design, Lab!

This year marks the first iteration of the new format, where students will embark on a hands-on learning experience as they delve into implementing the all-new RISC-V-based HaDes-V architecture.

Special thanks to David Beikircher and Florian Riedl for implementing the course.

Link to original LinkedIn post

Tobias Scheipel

I am a postdoctoral researcher and teacher at the Embedded Architectures & Systems Group at the Institute of Technical Informatics, Graz University of Technology. I conducted my PhD under the supervision of Prof. Marcel Baunach and graduated sub auspiciis Praesidentis rei publicae. You can find my dissertation here.

My research focuses on flexible and runtime-reconfigurable FPGA-based microcontroller architectures for embedded systems based on RISC-V. This involves hardware/software codesign strategies for both processor logic and embedded operating systems.

Apart from my research, I teach students how a CPU works, how to program embedded systems, how to write scientific publications, and how to create their own CPU.