This is a page for collecting information and material about the HaDes-V OER.
RISC-V Community Challenge with HaDes-V
RSVP and register on the official challenge website.
The kickoff slides can be found here, and the recording here:
After completing the course, students will be able to
- design a complete, modular RISC-V based microcontroller unit using SystemVerilog and development environments.
- analyze the functionality and efficiency of microcontroller designs using verification, synthesis and debugging tools.
- implement different pipeline stages of a microcontroller using processor architecture knowledge and hardware description languages.
- independently design innovative extensions for microcontrollers, combining hardware and software.
- explain the execution of software in processors and evaluate their interaction with the hardware.
- communicate technical design decisions in presentations and subsequently respond to feedback from colleagues.
Materials Overview
- HaDes-V Instruction Guide (DOI: 10.3217/nytm4-grv34, )
- HaDes-V Template Repository on GitHub (MIT license)
- Paper (published at RISC-V Summit Europe 2025)
- HaDes-V Matrix Chat: https://matrix.to/#/#mdlab:chat.tugraz.at
- Linux Mint 21 Virtual Machine (without the AMD Vivado toolchain; 4.5GB): https://cloud.tugraz.at/index.php/s/xFTeCnZZgca9HsJ
- Poster and presentation (published at RISC-V Summit Europe 2025, )
- Featured Work in the RISC-V Community Blog
- Community Challenge with HaDes-V (RISC-V Community)
- Introduction to the Community Challenge with HaDes-V (YouTube, )
- Presentation at the Unite Workshops on Assessment practicies and intercultural competence (slides, )
- Unite! Catalog listing of the corresponding course
Corporate Design
Licenses
